2097-V33PR6 A-B Output Module
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Figure 7 illustrates linear counter operation. In linear operation, the current count (Ctr[n].CurrentCount) value remains between, or equal to, the user-programmed minimum count (CtrnMinCount) and maximum count (CtrnMaxCount) values. If the Ctr[n].CurrentCount value goes above (>) or below (<) these values, the counter stops counting, and an overflow/underflow bit is set. The overflow/underflow bits can be reset using the CtrnResetCounterOverflow and CtrnResetCounterUnderflow bits.
Pulses are not accumulated in an overflow/underflow state. The counter begins counting again when pulses are applied in the proper direction. For example, if you exceed the maximum by 1000 counts, you do not need to apply 1000 counts in the opposite direction before the counter begins counting down. The first pulse in the opposite direction decrements the counter.
Figure 8 demonstrates ring counter operation. In ring counter operation, the current count (Ctr[n].CurrentCount) value changes between user-programmable minimum count (CtrnMinCount) and maximum count (CtrnMaxCount) values. If, when counting up, the counter reaches the CtrnMaxCount value, it rolls over to the CtrnMinCount value upon receiving the next count and sets the overflow bit. If, when counting down, the counter reaches the CtrnMinCount value, it rolls under to the CtrnMaxCount value upon receiving the next count and sets the underflow bit. These bits can be reset using the CtrnResetCounterOverflow and CtrnResetCounterUnderflow bits.
When the Pulse/Internal Direction mode is selected, the status of the Direction Invert bit, as controlled by the user program, determines the direction of the counter. The counter increments on the rising edge of the module’s A input when the Direction Invert bit is reset (0). The counter decrements on the rising edge of the A input when the Direction Invert bit is set (1).
In this mode, the counter channel increments on the rising edge of pulses applied to input A and decrements on the rising edge of pulses applied to input B. When set, the Direction Inhibit bit causes both A and B to increment. When set, the Direction Invert bit causes B to increment and A to decrement. When the Direction Invert and Direction Inhibit bits are both set, both A and B decrement.
In this mode, when a quadrature encoder is attached to inputs A and B, the count direction is determined by the phase relation of inputs A and B. If A leads B, the counter increments. If B leads A, the counter decrements. In other words, when B is low, the count increments on the rising edge of input A and decrements on the falling edge of input A. If B is high, all rising transitions on input A are ignored. The counter changes value only on one edge of input A as shown in Figure 5.
Each of the four possible counters can be configured to stop counting and set a flag at its limits (linear counter) or to rollover and set a flag at its limits (ring counter). A counter’s limits are programmed by the CtrnMaxCount and CtrnMinCount words in the module’s configuration array. Both types are described below.
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