2711-PK4C3A A-B Multi-Function Processor Module
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During normal operation, both the micro controller and your programming device can access the processor files stored in the RAM. Any changes to retentive data that occur due to program execution or programming commands affect only the retentive data in the RAM. The program files are never modified during normal operation. However, both the CPU and your programming device can read the program files stored in RAM. When a power down occurs, only the retentive data is transferred from the RAM to the EEPROM. (The program files do not need to be saved to the EEPROM since they cannot be modified during normal operation.) If for some reason power is lost before all of the retentive data is saved to the EEPROM, the retentive data is lost. This may occur due to an unexpected reset or a hardware problem.
The indexed address symbol is the # character. Place the # character immediately before the file–type identifier in a logical address. You can use more than one indexed address in your ladder program. Enter the offset value in word 24 of the status file (S:24). All indexed instructions use the same word S:24 to store the offset value. The processor starts operation at the base address plus the offset. You can manipulate the offset value in your ladder logic before each indexed address operation. When you specify indexed addresses, follow these guidelines: • Make sure the index value (positive or negative) does not cause the indexed address to exceed the file type boundary. • When an instruction uses more than two indexed addresses, the processor uses the same index value for each indexed address. • Set the index word to the offset value you want immediately before enabling an instruction that uses an indexed address.
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AB 1756-OF81
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AB 1756-PA72/C
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AB 1756-PA75R
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AB 1756-RM
AB 1756-RM2
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AB 1756SC-CTR8
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